Bergeron, Janick.
Writing testbenches functional verification of HDL models / [electronic resource] : Janick Bergeron. - New York : Kluwer Academic, c2002. - xxii, 354 p. : ill.
Includes index.
Electronic reproduction.
Palo Alto, Calif. :
ebrary,
2009.
Available via World Wide Web.
Access may be limited to ebrary affiliated libraries.
Computer hardware description languages.
Integrated circuits--Verification.
Electronic books.
TK7885.7 / .B47 2002eb
Writing testbenches functional verification of HDL models / [electronic resource] : Janick Bergeron. - New York : Kluwer Academic, c2002. - xxii, 354 p. : ill.
Includes index.
Electronic reproduction.
Palo Alto, Calif. :
ebrary,
2009.
Available via World Wide Web.
Access may be limited to ebrary affiliated libraries.
Computer hardware description languages.
Integrated circuits--Verification.
Electronic books.
TK7885.7 / .B47 2002eb