Verification by error modeling [electronic resource] : using testing techniques in hardware verification / written by Katarzyna Radecka, Zeljko Zilic.
By: Radecka, Katarzyna.
Contributor(s): Zilic, Zeljko | ProQuest (Firm).
Material type:
BookSeries: Frontiers in electronic testing: 25.Publisher: Boston : Kluwer Academic Publishers, 2003Description: xiv, 216 p. : ill.Subject(s): Integrated circuits -- Very large scale integration -- Computer-aided design | Integrated circuits -- Verification | Error analysis (Mathematics)Genre/Form: Electronic books.DDC classification: 621.39/5 Online resources: Click to View
| Item type | Current location | Collection | Call number | URL | Copy number | Status | Date due | Item holds |
|---|---|---|---|---|---|---|---|---|
E-book
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IUKL Library | Subscripti | https://ebookcentral.proquest.com/lib/kliuc-ebooks/detail.action?docID=3036051 | 1 | Available |
Total holds: 0
Includes bibliographical references and index.
Electronic reproduction. Ann Arbor, MI : ProQuest, 2015. Available via World Wide Web. Access may be limited to ProQuest affiliated libraries.
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