Ahmed Ibrahim Abugsheseta
A low-power and high speed recursive parallel multiplier cell with the application of DSP using FPGA/ Ahmed Ibrahim Abugsheseta. - Kajang: Infrastructure University Kuala Lumpur, 2018. - xiv, 158p.: col.ill.; 30 cm.
Thesis--Infrastructure University Kuala Lumpur, 2018
Includes bibliographical references
Field programmable gate arrays
Gate array circuits
YTK 5 2018
A low-power and high speed recursive parallel multiplier cell with the application of DSP using FPGA/ Ahmed Ibrahim Abugsheseta. - Kajang: Infrastructure University Kuala Lumpur, 2018. - xiv, 158p.: col.ill.; 30 cm.
Thesis--Infrastructure University Kuala Lumpur, 2018
Includes bibliographical references
Field programmable gate arrays
Gate array circuits
YTK 5 2018