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A low-power and high speed recursive parallel multiplier cell with the application of DSP using FPGA/ Ahmed Ibrahim Abugsheseta.

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BookPublisher: Kajang: Infrastructure University Kuala Lumpur, 2018Description: xiv, 158p.: col.ill.; 30 cm.Subject(s): Field programmable gate arrays | Gate array circuitsDissertation note: Thesis--Infrastructure University Kuala Lumpur, 2018

List(s) this item appears in: 20200110 Thesis (YTK 5 Master In Electronic Engineering)

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Item type	Current location	Collection	Call number	Copy number	Status	Date due	Item holds
Thesis, project paper	IUKL Library Open shelves	Institutio	YTK 5 2018 004 (Browse shelf)	1	Not For Loan
Electronic media (DVD, VCD, CD-ROM, etc.)	IUKL Library Media cabinets	Institutio	YTK 5 2018 (Browse shelf)	cd1	Not For Loan

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Thesis--Infrastructure University Kuala Lumpur, 2018

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