Normal view MARC view ISBD view

A low-power and high speed recursive parallel multiplier cell with the application of DSP using FPGA/ Ahmed Ibrahim Abugsheseta.

Material type: materialTypeLabel

BookPublisher: Kajang: Infrastructure University Kuala Lumpur, 2018Description: xiv, 158p.: col.ill.; 30 cm.Subject(s): Field programmable gate arrays | Gate array circuitsDissertation note: Thesis--Infrastructure University Kuala Lumpur, 2018

List(s) this item appears in: 20200110 Thesis (YTK 5 Master In Electronic Engineering)

Tags from this library: No tags from this library for this title. Log in to add tags.

Item type	Current location	Collection	Call number	Copy number	Status	Date due	Item holds
Thesis, project paper	IUKL Library Open shelves	Institutio	YTK 5 2018 004 (Browse shelf)	1	Not For Loan
Electronic media (DVD, VCD, CD-ROM, etc.)	IUKL Library Media cabinets	Institutio	YTK 5 2018 (Browse shelf)	cd1	Not For Loan

Total holds: 0

Previous	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available	Next
Previous	YTK 5 2018 001 Design and analysis of triband microstrip patch slot (MSPSA) antenna for 2.4 GHz, 5.3 GHz and 5.8 GHz of WLAN applications/	YTK 5 2018 002 Design of 8-bit processor element using adiabatic reversible logic/	YTK 5 2018 003 Design of multiband printed antennas for WLAN and WiMAX application/	YTK 5 2018 004 A low-power and high speed recursive parallel multiplier cell with the application of DSP using FPGA/	YTP 3 2021 A Bioinformatics Aided Metabolic Engineering of Saccharomyces Cerevisiaef for The Production of Bioethanol	YTP 3 2021 Detection Of an Environmental Vibrio Cholerae Isolate and Its Potential Virulence Factors	YTP 3 2021 Detection Of an Environmental Vibrio Cholerae Isolate and Its Potential Virulence Factors	Next

Thesis--Infrastructure University Kuala Lumpur, 2018

Includes bibliographical references

There are no comments for this item.

Browse results